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1. general description the PCU9956A is an ultra fast-mode (ufm) i 2 c-bus controlled 24-channel constant current led driver optimized for dimming and blinking 57 ma red/green/blue/amber (rgba) leds in amusement products. each led output has its own 8-bit resolution (256 steps) fixed frequency individual pwm c ontroller that operates at 31.25 khz with a duty cycle that is adjustable from 0 % to 99 .6 % to allow the led to be set to a specific brightness value. an additional 8-bit resoluti on (256 steps) group pwm controller has both a fixed frequency of 122 hz and an adjustable frequency between 15 hz to once every 16.8 seconds with a duty cycle that is adjustable from 0 % to 99.6 % that is used to either dim or blink all leds with the same value. each led output can be off, on (no pwm control), set at its individual pwm controller value or at both individual and group pwm controller values. the PCU9956A operates with a supply voltage range of 3 v to 5.5 v and the constant current sink led outputs allow up to 20 v for the led supply. the outpu t peak current is adjustable with an 8-bit linear dac from 225 ? a to 57 ma. a thermal shutdown feature protects the device when internal junction temperature exceeds the limit allo wed for the process. the PCU9956A device is the first led contro ller device in a new ultra fast-mode (ufm) i 2 c-bus family. ufm i 2 c-bus devices offer higher frequency (up to 5 mhz). the ufm i 2 c-bus slave devices operate in receive-only mode. that is, only i 2 c writes to PCU9956A are supported. as such, there are no stat us registers in PCU9956A. the PCU9956A allows significantly higher data transfer rate compared to the fast-mode plus version (pca9956a). the active low output enable input pin (oe ) blinks all the led outputs and can be used to externally pwm the outputs, which is usef ul when multiple devices need to be dimmed or blinked together without using software control. software programmable led group and three sub call i 2 c-bus addresses allow all or defined groups of PCU9956A devices to respond to a common i 2 c-bus address, allowing for example, all red leds to be turned on or off at the same time or marquee chasing effect, thus minimizing i 2 c-bus commands. on power-up, PCU9956A will have a unique sub call address to identify it as a 24-channel led driver. this allows mixing of devices with different channel widths. three hardware address pins on PCU9956A allow up to 125 devices on the same bus. PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver rev. 2 ? 29 june 2015 product data sheet
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 2 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver the software reset (swrst) function allows the master to perform a reset of the PCU9956A through the i 2 c-bus, identical to the power-on reset (por) that initializes the registers to their default stat e causing the output current switches to be off (led off). this allows an easy and quick way to reco nfigure all device registers to the same condition. 2. features and benefits ? 24 led drivers. each output programmable at: ? off ? on ? programmable led brightness ? programmable group dimming/blinking mi xed with individual led brightness ? programmable led output delay to reduce emi and surge currents ? 24 constant current output channels can sink up to 57 ma, tolerate up to 20 v when off ? output current adjusted through an external resistor (rext input) ? output current accuracy ? 4 % between output channels ? 6 % between PCU9956A devices ? thermal shut-down for overtemperature ? 5mhz ultrafast-mode i 2 c-bus interface ? 256-step (8-bit) linear programmable brightness per led output varying from fully off (default) to maximum brightness using a 31.25 khz pwm signal ? 256-step group brightness control allows general dimming (using a 122 hz pwm signal) from fully off to maximum brightness (default) ? 256-step group blinking with frequency programmable from 15 hz to 16.8 s and duty cycle from 0 % to 99.6 % ? output state change programmable on the ack nowledge (bit 9, this bit is always set to 1 by i 2 c-bus master) or the stop command to update outputs byte-by-byte or all at the same time (default to ?change on stop?). ? active low output enable (oe ) input pin allows for hardwa re blinking and dimming of the leds ? three quinary hardware address pins allow 125 PCU9956A devices to be connected to the same i 2 c-bus and to be individually programmed ? 4 software programmable i 2 c-bus addresses (one led group call address and three led sub call addresses) allow groups of devic es to be addressed at the same time in any combination (for example, one register used for ?all call? so that all the PCU9956As on the i 2 c-bus can be addressed at the same time and the second register used for three different addresses so that 1 3 of all devices on the bus can be addressed at the same time in a group). software enable and disable for each programmable i 2 c-bus address. ? unique power-up default sub call address a llows mixing of devices with different channel widths ? software reset feature (s wrst call) allows the devic e to be reset through the i 2 c-bus ? 8 mhz internal oscillator requ ires no external components
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 3 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver ? internal power-on reset ? noise filter on usda/uscl inputs ? no glitch on led outputs on power-up ? low standby current ? operating power supply voltage (v dd ) range of 3 v to 5.5 v ? 5.5 v tolerant inputs on non-led pins ? 40 q c to +85 q c operation ? esd protection exceeds 3000 v hbm per jesd22-a114 ? latch-up testing is done to jedec standard jesd78 which exceeds 100 ma ? packages offere d: htssop38 3. applications ? amusement products ? rgb or rgba led drivers ? led status information ? led displays ? lcd backlights ? keypad backlights for cellular phones or handheld devices 4. ordering information 4.1 ordering options table 1. ordering information type number topside mark package name description version PCU9956Atw PCU9956Atw htssop38 plastic thermal enhanced thin shrink small outline package; 38 leads; body width 4.4 mm; lead pitch 0.5 mm; exposed die pad sot1331-1 table 2. ordering options type number orderable part number package packing method minimum order quantity temperature PCU9956Atw PCU9956Atwy htssop38 reel 13? q1/t1 *standard mark smd dry pack 2500 t amb = 40 q cto+85qc
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 4 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 5. block diagram dim repetition rate = 122 hz. blink repetition rate = 15 hz to every 16.8 seconds. fig 1. block diagram of PCU9956A ad0 ad1 ad2 002aag458 i 2 c-bus control input filter PCU9956A power-on reset uscl usda v dd v ss led state select register pwm register x brightness control grpfreq register grppwm register mux/ control '0' C permanently off '1' C permanently on reset rext led22 led23 i/o regulator output driver, delay control and thermal shutdown input filter 200 k individual led current setting 8-bit dacs dac 23 led1 led0 dac 22 dac1 dac0 dim clock 31.25 khz 8 mhz oscillator 256 oe
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 5 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 6. pinning information 6.1 pinning (1) thermal pad; connected to v ss . fig 2. pin configuration for htssop38 002aag459 transparant top view PCU9956Atw 1 rext 2 ad0 3 ad1 4 ad2 5 oe 6 led0 7 led1 8 led2 9 led3 10 led4 11 led5 12 led6 13 led7 14 v ss 15 led8 16 led9 17 led10 18 v ss 19 led11 38 v dd 37 usda 36 uscl 35 reset 34 v ss 33 led23 32 led22 31 led21 30 led20 29 led19 28 led18 27 led17 26 led16 25 v ss 24 led15 23 led14 22 led13 21 v ss 20 led12 (1)
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 6 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 6.2 pin description [1] htssop38 package supply ground is connected to both v ss pins and exposed center pad. v ss pins must be connected to supply ground for pr oper device operation. for enhanced thermal, electrical, and board level performance, the exposed pad needs to be soldered to the board using a corresponding thermal pad on the board and for proper heat conduction through the board, thermal vias need to be incorporated in the printed-circuit board in the thermal pad region. table 3. pin description symbol pin type description rext 1 i current set resistor input; resistor to ground ad0 2 i address input 0 ad1 3 i address input 1 ad2 4 i address input 2 oe 5 i active low output enable for leds led0 6 o led driver 0 led1 7 o led driver 1 led2 8 o led driver 2 led3 9 o led driver 3 led4 10 o led driver 4 led5 11 o led driver 5 led6 12 o led driver 6 led7 13 o led driver 7 led8 15 o led driver 8 led9 16 o led driver 9 led10 17 o led driver 10 led11 19 o led driver 11 led12 20 o led driver 12 led13 22 o led driver 13 led14 23 o led driver 14 led15 24 o led driver 15 led16 26 o led driver 16 led17 27 o led driver 17 led18 28 o led driver 18 led19 29 o led driver 19 led20 30 o led driver 20 led21 31 o led driver 21 led22 32 o led driver 22 led23 33 o led driver 23 reset 35 i active low reset input uscl 36 i ufm serial clock line usda 37 i ufm serial data line v ss 14, 18, 21, 25, 34 [1] ground supply ground v dd 38 power supply supply voltage
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 7 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 7. functional description refer to figure 1 ? block diagram of PCU9956A ? . 7.1 device addresses following a start condition, the bus master must output the address of the slave it is accessing. for PCU9956A there are a maximum of 125 possible programmable addresses using the three quinary hardware address pins. 7.1.1 regular i 2 c-bus slave address the i 2 c-bus slave address of the PCU9956A is shown in figure 3 . the 7-bit slave address is determined by the quinary input pads ad0, ad1 and ad2. each pad can have one of five states (gnd, pull-up, floating, pull-down, and v dd ) based on how the input pad is connected on the board. at power-up or hardware/software reset, the quinary input pads are sampled and set the slave address of the device internally. to conserve power, once the slave address is deter mined, the quinary input pads are turned off and will not be sampled until the next time the device is power cycled. ta b l e 4 lists the five possible connections for the quinary input pads along with the external resistor values that must be used. [1] these ad[2:0] inputs must be stable before the supply v dd to chip. ta b l e 5 lists all 125 possible slave addresses of the device based on all combinations of the five states connected to three address input pins ad0, ad1 and ad2. table 4. quinary input pad connection pad connection (pins ad2, ad1, ad0) [1] mnemonic external resistor (k ? ) min. max. tie to ground gnd 0 17.9 resistor pull-down to ground pd 34.8 270 open (floating) flt 503 ? resistor pull-up to v dd pu 31.7 340 tie to v dd v dd 0 22.1 table 5. i 2 c-bus slave address hardware selectable input pins i 2 c-bus slave address for PCU9956A ad2 ad1 ad0 decimal hex binary (a[6:0]) address (r/w =0) gnd gnd gnd 1 01 0000001 [1] 02h gnd gnd pd 2 02 0000010 [1] 04h gnd gnd flt 3 03 0000011 [1] 06h gnd gnd pu 4 04 0000100 [1] 08h gnd gnd v dd 5 05 0000101 [1] 0ah gnd pd gnd 6 06 0000110 [1] 0ch gnd pd pd 7 07 0000111 [1] 0eh gnd pd flt 8 08 0001000 10h gnd pd pu 9 09 0001001 12h
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 8 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver gnd pd v dd 10 0a 0001010 14h gnd flt gnd 11 0b 0001011 16h gnd flt pd 12 0c 0001100 18h gnd flt flt 13 0d 0001101 1ah gnd flt pu 14 0e 0001110 1ch gnd flt v dd 15 0f 0001111 1eh gnd pu gnd 16 10 0010000 20h gnd pu pd 17 11 0010001 22h gnd pu flt 18 12 0010010 24h gnd pu pu 19 13 0010011 26h gnd pu v dd 20 14 0010100 28h gnd v dd gnd 21 15 0010101 2ah gnd v dd pd 22 16 0010110 2ch gnd v dd flt 23 17 0010111 2eh gnd v dd pu 24 18 0011000 30h gnd v dd v dd 25 19 0011001 32h pd gnd gnd 26 1a 0011010 34h pd gnd pd 27 1b 0011011 36h pd gnd flt 28 1c 0011100 38h pd gnd pu 29 1d 0011101 3ah pd gnd v dd 30 1e 0011110 3ch pd pd gnd 31 1f 0011111 3eh pd pd pd 32 20 0100000 40h pd pd flt 33 21 0100001 42h pd pd pu 34 22 0100010 44h pd pd v dd 35 23 0100011 46h pd flt gnd 36 24 0100100 48h pd flt pd 37 25 0100101 4ah pd flt flt 38 26 0100110 4ch pd flt pu 39 27 0100111 4eh pd flt v dd 40 28 0101000 50h pd pu gnd 41 29 0101001 52h pd pu pd 42 2a 0101010 54h pd pu flt 43 2b 0101011 56h pd pu pu 44 2c 0101100 58h pd pu v dd 45 2d 0101101 5ah table 5. i 2 c-bus slave address ?continued hardware selectable input pins i 2 c-bus slave address for PCU9956A ad2 ad1 ad0 decimal hex binary (a[6:0]) address (r/w =0)
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 9 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver pd v dd gnd 46 2e 0101110 5ch pd v dd pd 47 2f 0101111 5eh pd v dd flt 48 30 0110000 60h pd v dd pu 49 31 0110001 62h pd v dd v dd 50 32 0110010 64h flt gnd gnd 51 33 0110011 66h flt gnd pd 52 34 0110100 68h flt gnd flt 53 35 0110101 6ah flt gnd pu 54 36 0110110 6ch flt gnd v dd 55 37 0110111 6eh flt pd gnd 56 38 0111000 70h flt pd pd 57 39 0111001 72h flt pd flt 58 3a 0111010 74h fltpdpu593b0111011 76h flt pd v dd 60 3c 0111100 78h flt flt gnd 61 3d 0111101 7ah flt flt pd 62 3e 0111110 7ch flt flt flt 63 3f 0111111 7eh flt flt pu 64 40 1000000 80h flt flt v dd 65 41 1000001 82h flt pu gnd 66 42 1000010 84h flt pu pd 67 43 1000011 86h flt pu flt 68 44 1000100 88h flt pu pu 69 45 1000101 8ah flt pu v dd 70 46 1000110 8ch flt v dd gnd 71 47 1000111 8eh flt v dd pd 72 48 1001000 90h flt v dd flt 73 49 1001001 92h flt v dd pu 74 4a 1001010 94h flt v dd v dd 75 4b 1001011 96h pu gnd gnd 76 4c 1001100 98h pu gnd pd 77 4d 1001101 9ah pu gnd flt 78 4e 1001110 9ch pu gnd pu 79 4f 1001111 9eh pu gnd v dd 80 50 1010000 a0h table 5. i 2 c-bus slave address ?continued hardware selectable input pins i 2 c-bus slave address for PCU9956A ad2 ad1 ad0 decimal hex binary (a[6:0]) address (r/w =0)
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 10 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver pu pd gnd 81 51 1010001 a2h pu pd pd 82 52 1010010 a4h pu pd flt 83 53 1010011 a6h pu pd pu 84 54 1010100 a8h pu pd v dd 85 55 1010101 aah pu flt gnd 86 56 1010110 ach pu flt pd 87 57 1010111 aeh pu flt flt 88 58 1011000 b0h pu flt pu 89 59 1011001 b2h pu flt v dd 90 5a 1011010 b4h pu pu gnd 91 5b 1011011 b6h pu pu pd 92 5c 1011100 b8h pu pu flt 93 5d 1011101 bah pu pu pu 94 5e 1011110 bch pu pu v dd 95 5f 1011111 beh pu v dd gnd 96 60 1100000 c0h pu v dd pd 97 61 1100001 c2h pu v dd flt 98 62 1100010 c4h pu v dd pu 99 63 1100011 c6h pu v dd v dd 100 64 1100100 c8h v dd gnd gnd 101 65 1100101 cah v dd gnd pd 102 66 1100110 cch v dd gnd flt 103 67 1100111 ceh v dd gnd pu 104 68 1101000 d0h v dd gnd v dd 105 69 1101001 d2h v dd pd gnd 106 6a 1101010 d4h v dd pd pd 107 6b 1101011 d6h v dd pd flt 108 6c 1101100 d8h v dd pd pu 109 6d 1101101 dah v dd pd v dd 110 6e 1101110 dch v dd flt gnd 111 6f 1101111 deh v dd flt pd 112 70 1110000 e0h v dd flt flt 113 71 1110001 e2h v dd flt pu 114 72 1110010 e4h v dd flt v dd 115 73 1110011 e6h v dd pu gnd 116 74 1110100 e8h v dd pu pd 117 75 1110101 eah v dd pu flt 118 76 1110110 ech v dd pu pu 119 77 1110111 eeh v dd pu v dd 120 78 1111000 [1] f0h table 5. i 2 c-bus slave address ?continued hardware selectable input pins i 2 c-bus slave address for PCU9956A ad2 ad1 ad0 decimal hex binary (a[6:0]) address (r/w =0)
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 11 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver [1] see ?remark? below. remark: reserved i 2 c-bus addresses must be used with caution since they can interfere with: ? ?reserved for future use? i 2 c-bus addresses (0000 011, 1111 1xx) ? slave devices that use the 10-bit addressing scheme (1111 0xx) ? slave devices that are designed to resp ond to the general call address (0000 000) ? high-speed mode (hs-mode) master code (0000 1xx) the last bit of the address byte defines the operation to be performed. only writes to PCU9956A are supported, therefore the last bit is set to 0. no read available with ufm i 2 c-bus. 7.1.2 led all call i 2 c-bus address ? default power-up value (allcalladr register): e0h or 1110 000x ? programmable through i 2 c-bus (volatile programming) ? at power-up, led all call i 2 c-bus address is enabled. see section 7.3.10 ? allcalladr, led all call i 2 c-bus address ? for more detail. remark: the default led all call i 2 c-bus address (e0h or 1110 000x) must not be used as a regular i 2 c-bus slave address since this addre ss is enabled at power-up. all of the PCU9956As on the i 2 c-bus will recognize the address if sent by the i 2 c-bus master. v dd v dd gnd 121 79 1111001 [1] f2h v dd v dd pd 122 7a 1111010 [1] f4h v dd v dd flt 123 7b 1111011 [1] f6h v dd v dd pu 124 7c 1111100 [1] f8h v dd v dd v dd 125 7d 1111101 [1] fah (1) this slave address must match one of the 125 internal addresses as shown in table 5 . fig 3. PCU9956A slave address table 5. i 2 c-bus slave address ?continued hardware selectable input pins i 2 c-bus slave address for PCU9956A ad2 ad1 ad0 decimal hex binary (a[6:0]) address (r/w =0) 002aag460 a6 a5 a4 a3 a2 a1 a0 0 slave address (1) write only
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 12 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 7.1.3 led sub call i 2 c-bus addresses ? 3 different i 2 c-bus addresses can be used ? default power-up values: ? subadr1 register: eeh or 1110 111x ? subadr2 register: eeh or 1110 111x ? subadr3 register: eeh or 1110 111x ? programmable through i 2 c-bus (volatile programming) ? at power-up, subadr1 is enabled while subadr2 and subadr3 i 2 c-bus addresses are disabled. remark: at power-up subadr1 identifies this device as a 24-channel driver. see section 7.3.9 ? led sub call i 2 c-bus addresses for PCU9956A ? for more detail. remark: the default led sub call i 2 c-bus addresses may be used as regular i 2 c-bus slave addresses as long as they are disabled. 7.2 control register following the slave address, led all call address or led sub call address, the bus master will send a byte to the PCU9956A, wh ich will be stored in the control register. the lowest 7 bits are used as a pointer to determine which re gister will be accessed (d[6:0]). the highest bit is used as auto-increment flag (aif). this bit along with the mode1 register bit 5 and bit 6 provide the auto-increment feature. when the auto-increment flag is set (aif = logic 1), the seven low order bits of the control register are automatically increment ed after a write. this allows the user to program the registers sequentially. four differ ent types of auto-increment are possible, depending on ai1 and ai0 values of mode1 register. reset state = 80h remark: the control register does not apply to the software reset i 2 c-bus address. fig 4. control register 002aad850 aif d6 d5 d4 d3 d2 d1 d0 auto-increment flag register address
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 13 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver [1] ai1 and ai0 come from mode1 register. remark: other combinations not shown in ta b l e 6 (aif + ai[1:0] = 001b, 010b and 011b) are reserved and must not be used for proper device operation. aif + ai[1:0] = 000b is used when the same register must be accessed several times during a single i 2 c-bus communication, for example, changes the brightness of a single led. data is overwritten each time the register is accessed during a write operation. aif + ai[1:0] = 100b is used when all the registers must be sequentially accessed, for example, power-up programming. aif + ai[1:0] = 101b is used when the 24 led drivers must be individually programmed with different values during the same i 2 c-bus communication, for example, changing color setting to another color setting. aif + ai[1:0] = 110b is used when mode1 to ir ef23 registers must be programmed with different settings during the same i 2 c-bus communication. aif + ai[1:0] = 111b is used when the 24 led drivers must be individually programmed with different values in addition to global programming. only the 7 least significant bits d[6:0] ar e affected by the aif, ai1 and ai0 bits. when the control register is written, the regi ster entry point determined by d[6:0] is the first register that will be addressed (write operation), and can be anywhere between 00h and 3eh (as defined in table 7 ). when aif = 1, the auto-increment flag is set and the rollover value at which the register incr ement stops and goes to the next one is determined by aif, ai1 and ai0. see ta b l e 6 for rollover values. for example, if mode1 register bit ai1 = 0 and ai0 = 1 and if the cont rol register = 1001 0000, then the register addressing sequence will be (in hex): 10 ? 11 ? ? ? 21 ? 0a ? 0b ? ? ? 21 ? 0a ? 0b ? ? as long as the master keeps sending data. if mode1 register bit ai1 = 0 and ai0 = 0 and if the control register = 1010 0010, then the register addressing se quence will be (in hex): 22 ? 23 ? ? ? 3e ? 00 ? 01 ? ? ? 21 ? 0a ? 0b ? ? as long as the master keeps sending data. table 6. auto-increment options aif ai1 [1] ai0 [1] function 0 0 0 no auto-increment 1 0 0 auto-increment for registers (00h to 3e h). d[6:0] roll over to 00h after the last register 3eh is accessed. 1 0 1 auto-increment for individual brightness registers only (0ah to 21h). d[6:0] roll over to 0ah after the last register (21h) is accessed. 1 1 0 auto-increment for mode1 to iref23 control registers (00h to 39h). d[6:0] roll over to 00h after the last register (39h) is accessed. 1 1 1 auto-increment for global control registers and individual brightness registers (08h to 21h). d[6:0] roll over to 08h after the last register (21h) is accessed.
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 14 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver if mode1 register bit ai1 = 0 and ai0 = 1 and if the control register = 1000 0101, then the register addressing se quence will be (in hex): 05 ? 06 ? ? ? 21 ? 0a ? 0b ? ? ? 21 ? 0a ? 0b ? ? as long as the master keeps sending data. remark: writing to registers marked ?not used? will be ignored. 7.3 register definitions table 7. register summary register number (hex) d6 d5 d4 d3 d2 d1 d0 name type function 00h 0000000mode1 write only mode register 1 01h 0000001mode2 write only mode register 2 02h 0000010ledout0 write only led output state 0 03h 0000011ledout1 write only led output state 1 04h 0000100ledout2 write only led output state 2 05h 0000101ledout3 write only led output state 3 06h 0000110ledout4 write only led output state 4 07h 0000111ledout5 write only led output state 5 08h 0001000grppwm write only group duty cycle control 09h 0001001grpfreq write only group frequency 0ah 0001010pwm0 write only brightness control led0 0bh 0001011pwm1 write only brightness control led1 0ch 0001100pwm2 write only brightness control led2 0dh 0001101pwm3 write only brightness control led3 0eh 0001110pwm4 write only brightness control led4 0fh 0001111pwm5 write only brightness control led5 10h 0010000pwm6 write only brightness control led6 11h 0010001pwm7 write only brightness control led7 12h 0010010pwm8 write only brightness control led8 13h 0010011pwm9 write only brightness control led9 14h 0010100pwm10 write only brightness control led10 15h 0010101pwm11 write only brightness control led11 16h 0010110pwm12 write only brightness control led12 17h 0010111pwm13 write only brightness control led13 18h 0011000pwm14 write only brightness control led14 19h 0011001pwm15 write only brightness control led15 1ah 0011010pwm16 write only brightness control led16 1bh 0011011pwm17 write only brightness control led17 1ch 0011100pwm18 write only brightness control led18 1dh 0011101pwm19 write only brightness control led19 1eh 0011110pwm20 write only brightness control led20 1fh 0011111pwm21 write only brightness control led21
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 15 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver [1] writing to registers marked ?not used? will be ignored. 20h 0110000pwm22 write only brightness control led22 21h 0110001pwm23 write only brightness control led23 22h 0100010iref0 write only output gain control register0 23h 0100011iref1 write only output gain control register1 24h 0100100iref2 write only output gain control register2 25h 0100101iref3 write only output gain control register3 26h 0100110iref4 write only output gain control register4 27h 0100111iref5 write only output gain control register5 28h 0101000iref6 write only output gain control register6 29h 0101001iref7 write only output gain control register7 2ah 0101010iref8 write only output gain control register8 2bh 0101011iref9 write only output gain control register9 2ch 0101100iref10 write only output gain control register10 2dh 0101101iref11 write only output gain control register11 2eh 0101110iref12 write only output gain control register12 2fh 0101111iref13 write only output gain control register13 30h 0110000iref14 write only output gain control register14 31h 0110001iref15 write only output gain control register15 32h 0110010iref16 write only output gain control register16 33h 0110011iref17 write only output gain control register17 34h 0110100iref18 write only output gain control register18 35h 0110101iref19 write only output gain control register19 36h 0110110iref20 write only output gain control register20 37h 0110111iref21 write only output gain control register21 38h 0111000iref22 write only output gain control register22 39h 0111001iref23 write only output gain control register23 3ah 0111010offset write only offset/delay on ledn outputs 3bh 0111011subadr1 write only i 2 c-bus subaddress 1 3ch 0111100subadr2 write only i 2 c-bus subaddress 2 3dh 0111101subadr3 write only i 2 c-bus subaddress 3 3eh 0111110allcalladr write only all call i 2 c-bus address 3fh 0111111pwmall write only brightness control for all ledn 40h 1000000irefall write only output gain control for all registers iref0 to iref23 41h to 7fh -------reserved write onlynot used [1] table 7. register summary ?continued register number (hex) d6 d5 d4 d3 d2 d1 d0 name type function
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 16 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 7.3.1 mode1 ? mode register 1 [1] it takes 500 ? s max. for the oscillator to be up and running once sleep bit has been set to logic 0. timings on ledn outputs are not guaranteed if pwmx, grppwm or grpfreq registers are accessed within the 500 ? s window. [2] no blinking or dimming is possi ble when the oscillator is off. [3] the device must be reset if the led driver output state is set to ldrx=11 after the device is set back to normal mode. 7.3.2 mode2 ? mode register 2 table 8. mode1 - mode register 1 (address 00h) bit description legend: * default value. bit symbol access value description 7 aif write only 0 register auto-increment disabled. 1* register auto-increment enabled (write default logic 1). 6 ai1 write only 0* auto-increment bit 1 = 0. auto-increment range as defined in table 6 . 1 auto-increment bit 1 = 1. auto-inc rement range as defined in table 6 . 5 ai0 write only 0* auto-increment bit 0 = 0. auto-increment range as defined in table 6 . 1 auto-increment bit 0 = 1. auto-inc rement range as defined in table 6 . 4 sleep write only 0* normal mode [1] . 1 low power mode. oscillator off [2] [3] . 3 sub1 write only 0 PCU9956A does not respond to i 2 c-bus subaddress 1. 1* PCU9956A responds to i 2 c-bus subaddress 1. 2 sub2 write only 0* PCU9956A does not respond to i 2 c-bus subaddress 2. 1 PCU9956A responds to i 2 c-bus subaddress 2. 1 sub3 write only 0* PCU9956A does not respond to i 2 c-bus subaddress 3. 1 PCU9956A responds to i 2 c-bus subaddress 3. 0 allcall write only 0 PCU9956A does not respond to led all call i 2 c-bus address. 1* PCU9956A responds to led all call i 2 c-bus address. table 9. mode2 - mode register 2 (address 01h) bit description legend: * default value. bit symbol access value description 7 - - 0* not used (must write a logic 0) 6 - - 0* not used (must write a logic 0) 5 dmblnk write only 0* group control = dimming. 1 group control = blinking. 4 - - 0* reserved (must write a logic 0) 3 och write only 0* outputs change on stop command 1 outputs change on ack; this ninth bit is always set to 1 by ufm i 2 c-bus master 2 - - 1* reserved (must write a logic 1) 1 - - 0* reserved (must write a logic 0) 0 - - 1* reserved (must write a logic 1)
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 17 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 7.3.3 ledout0 to ledout5, led driver output state ldrx = 00 ? led driver x is off (x = 0 to 23). ldrx = 01 ? led driver x is fully on (individual brightness and group dimming/blinking not controlled). the oe pin can be used as external dimming/blinking control in this state. ldrx = 10 ? led driver x individual brightness can be controlled through its pwmx register (default power-up state). ldrx = 11 ? led driver x individual brightness and group dimming/blinking can be controlled through its pwmx register and the grppwm registers. remark: setting the device in low power mode while being on grou p dimming/blinking mode may cause the led output state to be in an unknown state after the device is set back to normal mode. the device must be reset and all register values reprogrammed. table 10. ledout0 to ledout5 - led driver ou tput state registers (address 02h to 07h) bit description legend: * default value. address register bit symbol access value description 02h ledout0 7:6 ldr3 write only 10* led3 output state control 5:4 ldr2 write only 10* led2 output state control 3:2 ldr1 write only 10* led1 output state control 1:0 ldr0 write only 10* led0 output state control 03h ledout1 7:6 ldr7 write only 10* led7 output state control 5:4 ldr6 write only 10* led6 output state control 3:2 ldr5 write only 10* led5 output state control 1:0 ldr4 write only 10* led4 output state control 04h ledout2 7:6 ldr11 write only 10* led11 output state control 5:4 ldr10 write only 10* led10 output state control 3:2 ldr9 write only 10* led9 output state control 1:0 ldr8 write only 10* led8 output state control 05h ledout3 7:6 ldr15 write only 10* led15 output state control 5:4 ldr14 write only 10* led14 output state control 3:2 ldr13 write only 10* led13 output state control 1:0 ldr12 write only 10* led12 output state control 06h ledout4 7:6 ldr19 write only 10* led19 output state control 5:4 ldr18 write only 10* led18 output state control 3:2 ldr17 write only 10* led17 output state control 1:0 ldr16 write only 10* led16 output state control 07h ledout5 7:6 ldr23 write only 10* led23 output state control 5:4 ldr22 write only 10* led22 output state control 3:2 ldr21 write only 10* led21 output state control 1:0 ldr20 write only 10* led20 output state control
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 18 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 7.3.4 grppwm, group duty cycle control when dmblnk bit (mode2 register) is programmed with logic 0, a 122 hz fixed frequency signal is superimposed with the 31. 25 khz individual brightness control signal. grppwm is then used as a global brightness control allowing the led outputs to be dimmed with the same value. the value in grpfreq is then a ?don?t care?. general brightness for the 24 outputs is co ntrolled through 256 linear steps from 00h (0 % duty cycle = led output off) to ffh (9 9.6 % duty cycle = maximum brightness). applicable to led outputs programmed with ldrx = 11 (ledout0 to ledout5 registers). when dmblnk bit is programmed with logic 1, grppwm and grpfreq registers define a global blinking pattern, where grpfreq contains the blinking period (from 67 ms to 16.8 s) and grppwm the duty cycle (on/off ratio in %). (1) 7.3.5 grpfreq, group frequency grpfreq is used to program the global blinking period when dmblnk bit (mode2 register) is equal to 1. value in this re gister is a ?don?t care? when dmblnk = 0. applicable to led outputs programmed with ldrx = 11 (ledout0 to ledout5 registers). blinking period is controlled through 256 linear steps from 00h (67 ms, frequency 15 hz) to ffh (16.8 s). (2) table 11. grppwm - group brightness control register (address 08h) bit description legend: * default value address register bit symbol access value description 08h grppwm 7:0 gdc[7:0] write only 1111 1111* grppwm register duty cycle gdc 7 : 0 ?? 256 -------------------------- = table 12. grpfreq - group frequency register (address 09h) bit description legend: * default value. address register bit symbol access value description 09h grpfreq 7:0 gfrq[7:0] write only 0000 0000* grpfreq register global blinking period gfrq 7 : 0 ?? 1 + 15.26 --------------------------------------- - s ?? =
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 19 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 7.3.6 pwm0 to pwm23, individual brightness control a 31.25 khz fixed frequency signal is used fo r each output. duty cycle is controlled through 256 linear steps from 00h (0 % duty cycle = led output off) to ffh (99.6 % duty cycle = led output at maximum brightness). applicable to led outputs programmed with ldrx = 10 or 11 (ledout0 to ledout5 registers). (3) remark: the first lower end 8 steps of pwm and t he last (higher end) steps of pwm will not have effective brightness control of leds due to edge rate contro l of led output pins. table 13. pwm0 to pwm23 - pwm registers 0 to 23 (address 0ah to 21h) bit description legend: * default value. address register bit symbol access value description 0ah pwm0 7:0 idc0[7:0] write only 0000 0000* pwm0 individual duty cycle 0bh pwm1 7:0 idc1[7:0] write only 0000 0000* pwm1 individual duty cycle 0ch pwm2 7:0 idc2[7:0] write only 0000 0000* pwm2 individual duty cycle 0dh pwm3 7:0 idc3[7:0] write only 0000 0000* pwm3 individual duty cycle 0eh pwm4 7:0 idc4[7:0] write only 0000 0000* pwm4 individual duty cycle 0fh pwm5 7:0 idc5[7:0] write only 0000 0000* pwm5 individual duty cycle 10h pwm6 7:0 idc6[7:0] write only 0000 0000* pwm6 individual duty cycle 11h pwm7 7:0 idc7[7:0] write only 0000 0000* pwm7 individual duty cycle 12h pwm8 7:0 idc8[7:0] write only 0000 0000* pwm8 individual duty cycle 13h pwm9 7:0 idc9[7:0] write only 0000 0000* pwm9 individual duty cycle 14h pwm10 7:0 idc10[7:0] write only 0000 0000* pwm10 individual duty cycle 15h pwm11 7:0 idc11[7:0] write only 0000 0000* pwm11 individual duty cycle 16h pwm12 7:0 idc12[7:0] write only 0000 0000* pwm12 individual duty cycle 17h pwm13 7:0 idc13[7:0] write only 0000 0000* pwm13 individual duty cycle 18h pwm14 7:0 idc14[7:0] write only 0000 0000* pwm14 individual duty cycle 19h pwm15 7:0 idc15[7:0] write only 0000 0000* pwm15 individual duty cycle 1ah pwm16 7:0 idc16[7:0] write only 0000 0000* pwm16 individual duty cycle 1bh pwm17 7:0 idc17[7:0] write only 0000 0000* pwm17 individual duty cycle 1ch pwm18 7:0 idc18[7:0] write only 0000 0000* pwm18 individual duty cycle 1dh pwm19 7:0 idc19[7:0] write only 0000 0000* pwm19 individual duty cycle 1eh pwm20 7:0 idc20[7:0] write only 0000 0000* pwm20 individual duty cycle 1fh pwm21 7:0 idc21[7:0] write only 0000 0000* pwm21 individual duty cycle 20h pwm22 7:0 idc22[7:0] write only 0000 0000* pwm22 individual duty cycle 21h pwm23 7:0 idc23[7:0] write only 0000 0000* pwm23 individual duty cycle duty cycle idcx 7 : 0 ?? 256 --------------------------- =
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 20 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 7.3.7 iref0 to iref23, led output current value registers these registers reflect the gain settings for output current for led0 to led23. table 14. iref0 to iref23 - led output gain control registers (address 22h to 39h) bit description legend: * default value. address register bit access value description 22h iref0 7:0 write only 00h* le d0 output current setting 23h iref1 7:0 write only 00h* le d1 output current setting 24h iref2 7:0 write only 00h* le d2 output current setting 25h iref3 7:0 write only 00h* le d3 output current setting 26h iref4 7:0 write only 00h* le d4 output current setting 27h iref5 7:0 write only 00h* le d5 output current setting 28h iref6 7:0 write only 00h* le d6 output current setting 29h iref7 7:0 write only 00h* le d7 output current setting 2ah iref8 7:0 write only 00h* le d8 output current setting 2bh iref9 7:0 write only 00h* le d9 output current setting 2ch iref10 7:0 write only 00h* led10 output current setting 2dh iref11 7:0 write only 00h* le d11 output current setting 2eh iref12 7:0 write only 00h* led12 output current setting 2fh iref13 7:0 write only 00h* led13 output current setting 30h iref14 7:0 write only 00h* led14 output current setting 31h iref15 7:0 write only 00h* led15 output current setting 32h iref16 7:0 write only 00h* led16 output current setting 33h iref17 7:0 write only 00h* led17 output current setting 34h iref18 7:0 write only 00h* led18 output current setting 35h iref19 7:0 write only 00h* led19 output current setting 36h iref20 7:0 write only 00h* led20 output current setting 37h iref21 7:0 write only 00h* led21 output current setting 38h iref22 7:0 write only 00h* led22 output current setting 39h iref23 7:0 write only 00h* led23 output current setting
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 21 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 7.3.8 offset ? ledn output delay offset register the PCU9956A can be programmed to have turn-on delay between led outputs. this helps to reduce peak current for the v dd supply and reduces emi. the order in which the led outputs are enabled will always be the same (channel 0 will enable first an d channel 23 will enable last). offset control register bits [3:0] determine the delay used between the turn-on times as follows: 0000 = no delay between outputs (all on, all off at the same time) 0001 = delay of 1 clock cycle (1 25 ns) between successive outputs 0010 = delay of 2 clock cycles (250 ns) between successive outputs 0011 = delay of 3 clock cycles (375 ns) between successive outputs : 0111 = delay of 7 clock cycles (875 ns) between successive outputs 1000 = delay of 8 clock cycles (1 ? s) between successive outputs 1001 = delay of 9 clock cycles (1.125 ? s) between successive outputs 1010 = delay of 10 clock cycles (1.25 ? s) between successive outputs 1011 = delay of 11 clock cycles (1.375 ? s) between successive outputs 1100 to 1111 = reserved and do not use example: if the value in the offset register is 1000 the corresponding delay = 8 ? 125 ns = 1 ? s delay between successive outputs. channel 0 turns on at time 0 ? s channel 1 turns on at time 1 ? s channel 2 turns on at time 2 ? s channel 3 turns on at time 3 ? s channel 4 turns on at time 4 ? s channel 5 turns on at time 5 ? s channel 6 turns on at time 6 ? s channel 7 turns on at time 7 ? s channel 8 turns on at time 8 ? s channel 9 turns on at time 9 ? s channel 10 turns on at time 10 ? s channel 11 turns on at time 11 ? s channel 12 turns on at time 12 ? s channel 13 turns on at time 13 ? s table 15. offset - ledn output delay offset register (address 3ah) bit description legend: * default value. address register bit access value description 3ah offset 7:4 - 0000* not used (must write a logic 0) 3:0 write only 1000* ledn ou tput delay offset factor
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 22 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver channel 14 turns on at time 14 ? s channel 15 turns on at time 15 ? s channel 16 turns on at time 16 ? s channel 17 turns on at time 17 ? s channel 18 turns on at time 18 ? s channel 19 turns on at time 19 ? s channel 20 turns on at time 20 ? s channel 21 turns on at time 21 ? s channel 22 turns on at time 22 ? s channel 23 turns on at time 23 ? s 7.3.9 led sub call i 2 c-bus addresses for PCU9956A default power-up values are eeh, eeh, eeh. at power-up, subadr1 is enabled while subadr2 and subadr3 are disabled. the power-up default bit subaddress of eeh indicates that this device is a 24-channel led driver. all three subaddresses are programmable. once subaddresses have been programmed to their right values, subx bits need to be set to logic 1 in order to have the device respond to these addresses (mode1 register ) (0). when subx is set to logic 1, the corresponding i 2 c-bus subaddress can be used during a ufm i 2 c-bus write sequence. 7.3.10 allcalladr, led all call i 2 c-bus address the led all call i 2 c-bus address allows all the PCU9956As on the bus to be programmed at the same time (allcall bit in register mode1 must be equal to logic 1 [power-up default state]). this add ress is programmable through the i 2 c-bus and can be used during an i 2 c-bus write sequence. the register address can also be programmed as a sub call. table 16. subadr1 to subadr3 - i 2 c-bus subaddress registers 1 to 3 (address 3bh to 3dh) bit description legend: * default value. address register bit symbol access value description 3bh subadr1 7:1 a1[7:1] write only 1110 111* i 2 c-bus subaddress 1 0 a1[0] write only 0* reserved 3ch subadr2 7:1 a2[7:1] write only 1110 111* i 2 c-bus subaddress 2 0 a2[0] write only 0* reserved 3dh subadr3 7:1 a3[7:1] write only 1110 111* i 2 c-bus subaddress 3 0 a3[0] write only 0* reserved table 17. allcalladr - led all call i 2 c-bus address register (address 3eh) bit description legend: * default value. address register bit symbol access value description 3eh allcalladr 7:1 ac[7:1] write only 1110 000* allcall i 2 c-bus address register 0 ac[0] write only 0* reserved
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 23 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver only the 7 msbs representing the all call i 2 c-bus address are valid. the lsb in allcalladr register must write a logic 0. if allcall bit = 0 in mode1 register, the device does not recognize the address programmed in register allcalladr. 7.3.11 pwmall ? brightness control for all ledn outputs when programmed, the value in this register will be used fo r pwm duty cycle for all the ledn outputs and will be reflected in pwm 0 through pwm23 registers. remark: write to any of the pwm0 to pwm23 registers will overwrite the value in corresponding pwmn register programmed by pwmall. 7.3.12 irefall register: output current value for all led outputs the output current setting for all outputs is he ld in this register. wh en this register is written to or updated, all led ou tputs will be set to a current co rresponding to this register value. writes to iref0 to iref23 will over write the output current settings. 7.3.13 led driver constant current outputs in led display applications, PCU9956A provides nearly no current variations from channel to channel and from device to device. the maximum current skew between channels is less than ? 4 % and less than ? 6 % between devices. 7.3.13.1 adjusting output current the PCU9956A scales up the reference current (i ref ) set by the external resistor (r ext ) to sink the output current (i o ) at each output port. the ma ximum output current for the outputs can be set using r ext . in addition, the constant valu e for current drive at each of the outputs is independently programmable using command registers iref0 to iref23. alternatively, programming the irefall register allows all outputs to be set at one current value determined by the value in irefall register. equation 4 and equation 5 can be used to calculate t he minimum and maximum constant current values that can be programmed for the outputs for a chosen r ext . (4) (5) table 18. pwmall - brightness control for all ledn outputs register (address 3fh) bit description legend: * default value. address register bit access value description 3fh pwmall 7:0 write only 0000 0000* duty cycle for all ledn outputs table 19. irefall - output gain control for all led outputs (address 40h) bit description legend: * default value. address register bit access value description 40h irefall 7:0 write only 00h* current gain setting for all led outputs i o _ led _ min 900 mv r ext ------------------- 1 4 -- - ? minimum constant current ?? = i o _ led _ max 255 i o _ led _ min ? ?? 900 mv r ext ------------------- 255 4 -------- - ? ?? ?? ==
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 24 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver for a given irefx setting, . example 1: if r ext =1k ? , i o _led_min = 225 ? a, i o _led_max = 57.375 ma (as shown in figure 6 ). so each channel can be programmed with its individual irefx in 256 steps and in 225 ? a increments to a maximum output current of 57.375 ma independently. i o(ledn) (ma) = irefx ? (0.9 / 4) / r ext (k ? ) maximum i o(ledn) (ma) = 255 ? (0.9 / 4) / r ext (k ? ) remark: default irefx at power-up = 0. fig 5. maximum i led versus r ext fig 6. i o(target) versus irefx value with r ext =1k ? i o _ led irefx 900 mv r ext ------------------- ? 1 4 -- - ? = r ext (k) 1 10 9 48 2 002aag288 0 60 40 20 80 i o(ledn) (ma) 5 6 irefx = 255 3 7 irefx[7:0] value 0 255 192 128 64 002aah691 20 30 10 40 50 i o(target) (ma) 0 32 96 160 224 60 57.375
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 25 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver example 2: if r ext =2k ? , i o _led_min = 112.5 ? a, i o _led_max = 28.687 ma (as shown in figure 7 ). so each channel can be programmed with its individual irefx in 256 steps and in 112.5 ? a increments to a maximum output channel of 28.687 ma independently. 7.3.14 overtemperature protection if the PCU9956A chip temperature exceeds its limit (t max , see ta b l e 2 2 ), all output channels will be disabled unt il the temperature drops belo w its limit minus a small hysteresis (t hys , see ta b l e 2 2 ). once the die temperature reduces below the t max ? t hys , the chip will return to the sa me condition it was prior to the overtemp erature event. 7.4 active low out put enable input the active low output enable (oe ) pin on PCU9956A allows to enable or disable all the led outputs at the same time. ? when a low level is applied to oe pin, all the led outputs are enabled. ? when a high level is applied to oe pin, all the led outputs are high-impedance. the oe pin can be used as a synchronization signal to switch on/off several PCU9956A devices at the same time when led drive ou tput state is set fully on (ldrx = 01 in ledoutx register) in these devices. this requires an external clock reference that provides blinking period and the duty cycle. the oe pin can also be used as an external dimming control signal. the frequency of the external clock must be high enough not to be seen by the human eye, and the duty cycle value determines the brightness of the leds. remark: do not use oe as an external blinking control signal when internal global blinking is selected (dmblnk = 1, mode2 register) since it will result in an undefined blinking pattern. do not use oe as an external dimming control signal when internal global dimming is selected (dmblnk = 0, mode2 register) since it will result in an undefined dimming pattern. fig 7. i o(target) versus irefx value with r ext =2k ? 002aah667 irefx[7:0] value 0 255 192 128 64 10 20 30 i o(target) (ma) 0 32 96 224 160
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 26 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 7.5 power-on reset when power is applied to v dd , an internal power-on reset holds the PCU9956A in a reset condition until v dd has reached v por . at this point, the reset condition is released and the PCU9956A registers and i 2 c-bus state machine are initialized to their default states (all zeroes) causing all the channels to be deselected. thereafter, v dd must be pulled lower than 1 v and stay low for longer than 20 ? s. the device will reset itself, and allow 2 ms for the device to fully wake up. remark: in order to guarantee a proper power-on reset operation for device, the rising rate of v dd must be less than 3 ms per 1 v or less than 10 ms from 0 v to 3.3 v. also, v dd must return to 0 v for a minimum of 10 ms before rising again while v dd power is re-cycling. 7.6 hardware r eset recovery when a reset of PCU9956A is activated using an ac tive low input on the reset pin, a reset pulse width of 2.5 ? s minimum is required. the maximum wait time after reset pin is released is 1.5 ms. 7.7 software reset the software reset call (swrst call) allows all the devices in the i 2 c-bus to be reset to the power-up state value through a specific formatted i 2 c-bus command. to be performed correctly, it im plies that the i 2 c-bus is functional and that there is no device hanging the bus. the maximum wait time after software reset is 1 ms. the swrst call function is defined as the following: 1. a start command is sent by the i 2 c-bus master. 2. the reserved general call address ?0000 000? with the r/w bit set to ?0? (write) is sent by the i 2 c-bus master. 3. since PCU9956A is a ufm i 2 c-bus device, no acknowledge is returned to the i 2 c-bus master. 4. once the general call address has been se nt, the master sends 1 byte with 1 specific value (swrst data byte 1): byte 1 = 06h. if more than 1 byte of data is sent, they will be ignored by the PCU9956A. 5. once the correct byte (swrst data byte 1) has been sent, the master sends a stop command to end the swrst function: the PCU9956A then resets to the default value (power-up value) and is ready to be addressed again within the specified bus free time (t buf ).
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 27 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver fig 8. swrst call 0 0 0 0 0 0 0 1 s 0 general call address start condition this bit is always = 1 002aaf099 swrst data byte 1 1 this bit is always = 1 p stop condition 0000110 0
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 28 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 7.8 individual brightness contro l with group dimming/blinking a 31.25 khz fixed frequency signal with progr ammable duty cycle (8 bits, 256 steps) is used to control individually the brightness for each led. on top of this signal, one of the following si gnals can be superimposed (this signal can be applied to the 24 led outputs led0 to led23). ? a lower 122 hz fixed frequency signal with programmable duty cycle (8 bits, 256 steps) is used to provide a global brightness control. ? a programmable frequency signal from 15 hz to every 16.8 seconds (8 bits, 256 steps) with programmable duty cycle (8 bits, 256 steps) is used to provide a global blinking control. minimum pulse width for ledn brightness control is 125 ns. minimum pulse width for group dimming is 32 ? s. when m = 1 (grppwm register value), the re sulting ledn brightness control + group dimming signal will have 1 pulse of the led brightness control signal (pulse width = n ? 125 ns, with ?n? defined in pwmx register). this resulting brightness + group dimming signal above shows a resulting control signal with m = 8. fig 9. brightness + group dimming signals 123456789101112 251 252 253 254 255 256 1234567891011 brightness control signal (ledn) m 256 125 ns with m = (0 to 255) (grppwm register) n 125 ns with n = (0 to 255) (pwmx register) 256 125 ns = 32 s (31.25 khz) 12345678 12345678 group dimming signal resulting brightness + group dimming signal 256 256 125 ns = 8.19 ms (122 hz) 002aaf935
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 29 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 8. characteristics of the PCU9956A ultra fast-mode i 2 c-bus the PCU9956A led controller uses the new ultra fast-mode (ufm) i 2 c-bus to communicate with the ufm i 2 c-bus capable host controller. like the standard mode and fast-mode plus (fm+) i 2 c-bus, it uses two lines for communication. they are a serial data line (usda) and a serial clock line (uscl). the ufm is a unidirectional bus that is capable of higher frequency (up to 5 mhz). the ufm i 2 c-bus slave devices operate in receive-only mode. that is, only i 2 c writes to PCU9956A are supported. 8.1 bit transfer one data bit is transferred during each cl ock pulse. the data on the usda line must remain stable during the high period of the cl ock pulse as changes in the data line at this time will be interpreted as control signals (see figure 10 ). 8.1.1 start and stop conditions both data and clock lines remain high when the bus is not busy. a high-to-low transition of the data line while the clock is high is defined as the start condition (s). a low-to-high transition of the data line while the clock is high is defined as the stop condition (p) (see figure 11 ). fig 10. bit transfer 002aaf113 data line stable; data valid change of data allowed usda uscl fig 11. definition of start and stop conditions 002aaf114 usda uscl p stop condition s start condition
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 30 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 8.2 system configuration a device generating a message is a ?transmitter ?; a device receiving is the ?receiver?. the device that controls the message is the ?master? and the devices which are controlled by the master are the ?slaves? (see figure 12 ). 8.3 data transfer the number of data bytes transferred betwe en the start and the stop conditions from transmitter to receiver is not limited. each byte of eight bits is followed by one bit that is always set to 1. the master gene rates an extra related clock pulse. fig 12. system configuration 002aaf100 slave ufm receiver usda uscl master ufm transmitter slave ufm receiver slave ufm receiver fig 13. data transfer 002aaf101 s start condition 9 8 2 1 usda data output by master ufm transmitter uscl clock from master
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 31 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 9. bus transactions (1) see table 5 for i 2 c-bus slave address. (2) see table 7 for register definition. fig 14. write to a specific register a5 a4 a3 a2 a1 a0 0 1 s a6 slave address (1) start condition write only this bit always = 1 002aag461 data for register d[7:0] d6 d5 d4 d3 d2 d1 d0 x control register auto-increment flag (dont care) 1 this bit always = 1 1 this bit always = 1 p stop condition register address (2) (1) ai1, ai0 = 00. see table 6 for auto-increment options. remark: care should be taken to load the appropriate value here in the ai1 and ai0 bits of the mode1 register for programming the part with the required auto-increment options. fig 15. write to all registers using the auto-increment feature a5 a4 a3 a2 a1 a0 0 1 s a6 slave address start condition write only this bit always = 1 002aag462 mode1 register data (1) 0 0 0 0 0 0 0 1 control register auto-increment on 1 this bit always = 1 1 this bit always = 1 p stop condition (cont.) (cont.) mode1 register selection mode2 register data 1 this bit always = 1 allcalladr register data 1 this bit always = 1
xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxx x x x xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xx xx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxx xxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxx x x xxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxx xxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxx xxxxxxxxxxxxxxxxxxxxxxxxx xxxxxxxxxxxxxxxxxxxx xxx PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 32 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver this example assumes that aif + ai[1:0] = 101b. fig 16. multiple writes to indivi dual brightness registers only using the auto-increment feature a5 a4 a3 a2 a1 a0 0 1 s a6 slave address start condition write only this bit always = 1 002aag463 pwm0 register data 0 0 0 1 0 1 0 1 control register auto-increment on 1 this bit always = 1 1 this bit always = 1 p stop condition (cont.) (cont.) pwm0 register selection pwm1 register data 1 this bit always = 1 pwm22 register data 1 this bit always = 1 pwm23 register data 1 this bit always = 1 pwm0 register data 1 this bit always = 1 register rollover pwm22 register data 1 this bit always = 1 pwm23 register data 1 this bit always = 1
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 33 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver (1) in this example, several PCU9956As are used and the same sequence (a) (above) is sent to each of them. (2) allcall bit in mode1 register is pr eviously set to 1 for this example. (3) och bit in mode2 register is prev iously set to 1 for this example. fig 17. led all call i 2 c-bus address programming and led all call sequence example a5 a4 a3 a2 a1 a0 0 1 s a6 slave address (1) start condition write only this bit always = 1 002aah722 0 1 1 1 1 1 0 1 control register auto-increment on 1 this bit always = 1 allcalladr register selection 0 1 0 1 0 1 x 1 new led all call i 2 c address (2) p stop condition 1 this bit always = 1 0 1 0 1 0 1 0 1 s 1 led all call i 2 c address start condition write only this bit always = 1 0 0 0 0 0 1 0 1 control register 1 this bit always = 1 ledout0 register selection 1 0 1 0 1 0 1 0 ledout0 register (led fully on) p stop condition 1 multiple leds are on at the 9th bit (3) sequence (a) sequence (b) (cont.) (cont.) 1 0 1 0 1 0 1 0 ledout3 register (led fully on) 1 multiple leds are on at the 9th bit (3) 1 0 1 0 1 0 1 0 ledout4 register (led fully on) 1 multiple leds are on at the 9th bit (3) this bit always = 1 this bit always = 1 this bit always = 1 1 0 1 0 1 0 1 0 ledout5 register (led fully on) 1 multiple leds are on at the 9th bit (3) this bit always = 1 auto-increment on
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 34 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 10. application design-in information (1) oe requires pull-up resistor if control signal from the master is open-drain. (2) i 2 c-bus address = 1101001 when ad0, ad2 tied to v dd and ad1 tied to v ss (see table 5 ). fig 18. typical application PCU9956A led0 usda uscl v dd = 3.3 v or 5.0 v ufm i 2 c-bus/ smbus master usda uscl ad2 v dd v ss v ss reset reset rext iset led1 led2 led3 led4 led5 led6 led7 led8 led9 led10 led11 led12 led13 led14 led15 1.1 k (optional) ad0 (2) ad1 002aag465 led16 led17 led18 led19 led20 led21 led22 led23 up to 20 v c 10 f oe oe 10 k (1)
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 35 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 10.1 thermal considerations since the PCU9956A device integrates 24 lin ear current sources, thermal considerations should be taken into account to prevent overheating, which can cause the device to go into thermal shutdown. perhaps the major contributor for device?s overheating is the led forward voltage mismatch. this is because it can cause significant voltage differences between the led strings of the same type (e.g., 2 v to 3 v), wh ich ultimately translates into higher power dissipation in the device. the voltage drop ac ross the led channels of the device is given by the difference between the supply voltage and the led forward voltage of each led string. reducing this to a minimum (e.g., 0. 8 v) helps to keep the power dissipation down. therefore leds binning is recommended to minimize led voltage forward variation and reduce power dissipation in the device. in order to en sure that the device will no t go into thermal shutdo wn when operating under certain application conditions, its junction temperature (t j ) should be calculated to ensure that is below the overtemperature threshold limit (130 ? c). the t j of the device depends on the ambient temperature (t amb ), device?s total power dissipation (p tot ), and thermal resistance. the device junction temperature can be calculated by using the following equation: (6) where: t j = junction temperature t amb = ambient temperature r th(j-a) = junction to ambient thermal resistance p tot = (device) total power dissipation an example of this calculation is show below: conditions: t amb = 50 ? c r th(j-a) = 33.9 ? c/w (per jedec 51 stan dard for multilayer pcb) i led = 30 ma / channel i dd(max) = 20 ma v dd = 5 v leds per channel = 5 leds / channel led v f(typ) = 3 v per led (15 v total for 5 leds in series) led v f mismatch = 0.2 v per led (1 v total for 5 leds in series) v reg(drv) = 0.8 v (this will be present only in t he led string with the highest led forward voltage.) v sup = led v f(typ) + led v f mismatch + v reg(drv) = 15 v + 1 v + 0.8 v = 16.8 v t j t amb r th j - a ?? p tot ? +=
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 36 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver p tot calculation: p tot = ic_power + led drivers_power; ic_power = (i dd ? v dd ) ic_power = (0.02 a ? 5v) = 0.1w led drivers_power = [(24 ? 1) ? (i led ) ? (led v f mismatch + v reg(drv) )] + (i led ? v reg(drv) ) led drivers_power = [23 ? 0.03 a ? (1 v + 0.8 v)] + (0.03 a ? 0.8 v)] = 1.266 w p tot = 0.1 w + 1.266 w = 1.366 w t j calculation: t j = t amb + r th(j-a) ? p tot t j = 50 ? c + (33.9 ? c/w ? 1.366 w) = 96.31 ? c this confirms that the junction temperat ure is below the minimum overtemperature threshold of 130 ? c, which ensures the device will not go into thermal shutdown under these conditions. it is important to mention that the value of the thermal resistance junction-to-ambient (r th(j-a) ) strongly depends in the pcb design. th erefore, the thermal pad of the device should be attached to a big enough pcb copper area to ensure proper thermal dissipation (similar to jedec 51 standard). several thermal vias in the pcb thermal pad should be used as well to increase the effectiveness of the heat dissipation (for example, 15 thermal vias). the thermal vias should be dist ributed evenly in the pcb thermal pad. finally, it is important to poin t out that this calculation shoul d be taken as a reference only and therefore ev aluations should still be performed under the app lication environment and conditions to confirm proper system operation.
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 37 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 11. limiting values 12. thermal characteristics [1] per jedec 51 standard for multilayer pcb and wind speed (nm/s) = 0. table 20. limiting values in accordance with the absolute ma ximum rating system (iec 60134). symbol parameter conditions min max unit v dd supply voltage ? 0.5 +6.0 v v i/o voltage on an input/output pin v ss ? 0.5 5.5 v v drv(led) led driver voltage v ss ? 0.5 20 v i o(ledn) output current on pin ledn - 65 ma i ss ground supply current - 2.5 a p tot total power dissipation t amb =25 ? c-2 . 9 5 w t amb =85 ? c-1 . 1 8 w t stg storage temperature ? 65 +150 ?c t amb ambient temperature operating ? 40 +85 ?c t j junction temperature ? 40 +125 ?c table 21. thermal characteristics symbol parameter conditions typ unit r th(j-a) thermal resistance from junction to ambient htssop38 [1] 33.9 ?c/w
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 38 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 13. static characteristics table 22. static characteristics v dd = 3 v to 5.5 v; v ss =0v; t amb = ? 40 ? cto+85 ? c; unless otherwise specified. symbol parameter conditions min typ [1] max unit supply v dd supply voltage 3 - 5.5 v i dd supply current on pin v dd ; operating mode; f scl =1mhz r ext =2k ? ; led[23:0] = off; irefx = 00h -1112ma r ext =1k ? ; led[23:0] = off; irefx = 00h -1314ma r ext =2k ? ; led[23:0] = on; irefx = ffh -1519ma r ext =1k ? ; led[23:0] = on; irefx = ffh -1721ma i stb standby current on pin v dd ; no load; f scl =0hz; mode1[4] = 1; v i =v dd v dd = 3.3 v - 100 600 ? a v dd = 5.5 v - 100 700 ? a v por power-on reset voltage no load; v i =v dd or v ss -2- v v pdr power-down reset voltage no load; v i =v dd or v ss [2] -1- v inputs uscl, usda v il low-level input voltage ? 0.5 - +0.3v dd v v ih high-level input voltage 0.7v dd -5.5v i l leakage current v i =v dd or v ss ? 1- +1 ? a c i input capacitance v i =v ss - 6 10 pf current controlled outputs (led[23:0]) i o(ledn) output current on pin ledn v o = 0.8 v; irefx = 80h; r ext =1k ? 25 - 30 ma v o = 0.8 v; irefx = ffh; r ext =1k ? 50 - 60 ma ? i o output current variation v dd =3.0v; t amb =25 ?c; v o =0.8v; irefx = 80h; r ext =1k ? ; guaranteed by design between bits (different ics, same channel) [3] -- ? 6% between bits (2 channels, same ic) [4] -- ? 4% v reg(drv) driver regulation voltage minimum regulation voltage; irefx = ffh; r ext =1k ? 0.8 1 20 v i l(off) off-state leakage current v o =20v - - 1 ? a oe input, reset input v il low-level input voltage ? 0.5 - +0.3v dd v v ih high-level input voltage 0.7v dd -5.5v i li input leakage current ? 1- +1 ? a c i input capacitance - 3.7 5 pf
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 39 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver [1] typical limits at v dd = 3.3 v, t amb =25 ? c. [2] v dd must be lowered to 0.8 v in order to reset part. [3] part-to-part mismatch is calculated: where ?ideal output current? = 28.68 ma (r ext =1k ? , irefx = 80h). [4] channel-to-channel mismatch is calculated: address inputs ad2, ad1, ad0 v i input voltage voltage on an input pin ? 0.5 - +5.5 v i li input leakage current ? 1- +1 ? a c i input capacitance - 3.7 5 pf overtemperature protection t th(otp) overtemperature protection threshold temperature rising 130 - 150 ?c hysteresis 15 - 30 ?c table 22. static characteristics ?continued v dd = 3 v to 5.5 v; v ss =0v; t amb = ? 40 ? cto+85 ? c; unless otherwise specified. symbol parameter conditions min typ [1] max unit ? % i oled0 ?? i oled1 ?? ? i oled22 ?? i oled23 ?? +++ + 24 --------------------------------------------------------------------------------------------------------------------------- - ideal output current ? ?? ?? ideal output current ---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- ?? ?? ?? ?? ?? 100 ? = ? % i oledn ?? where n = 0 to 23 ?? i oled0 ?? i oled1 ?? ? i oled22 ?? i oled23 ?? +++ + 24 --------------------------------------------------------------------------------------------------------------------------- - ?? ?? ------------------------------------------------------------------------------------------------------------------------------- -- 1 ? ?? ?? ?? ?? ?? 100 ? =
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 40 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 14. dynamic characteristics [1] minimum uscl clock frequency is limited by the bus time-out feature, which resets t he serial bus interface if either usda or uscl is held low for a minimum of 25 ms. disable bus time-out feature for dc operation. [2] t vd;dat is not applicable to the ufm i 2 c-bus slave device. table 23. dynamic characteristics all the timing limits are valid within the operating supply voltage and ambient temperature range; v dd =3v ? 0.2 v and 5.5 v ? 0.3 v; t amb = ? 40 ? c to +85 ? c; and refer to v il and v ih with an input voltage of v ss to v dd . symbol parameter conditions min typ max unit f uscl uscl clock frequency [1] 0 - 5000 khz t buf bus free time between a stop and start condition 0.08 - - ? s t hd;sta hold time (repeated) start condition 0.05 - - ? s t su;sta set-up time for a repeated start condition 0.05 - - ? s t su;sto set-up time for st op condition 0.05 - - ? s t hd;dat data hold time 10 - - ns t vd;dat data valid time [2] ---ns t su;dat data set-up time 30 - - ns t low low period of the uscl clock 50 - - ns t high high period of the uscl clock 50 - - ns t f fall time of both usda and uscl signals - - 50 ns t r rise time of both usda and uscl signals - - 50 ns t sp pulse width of spikes that must be suppressed by the input filter - - 10 ns fig 19. definition of timing t sp t buf t hd;sta p p s t low t r t hd;dat t f t high t su;dat t su;sta sr t hd;sta t su;sto usda uscl 002aag331 0.7 v dd 0.3 v dd 0.7 v dd 0.3 v dd
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 41 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 15. test information rise and fall times refer to v il and v ih . fig 20. ufm i 2 c-bus timing diagram uscl usda t hd;sta t su;dat t hd;dat t f t buf t su;sta t low t high 002aag332 t su;sto protocol start condition (s) bit 7 msb bit 6 bit 1 (d1) bit 0 (d0) 1 / f uscl t r (always set to 1 by master) stop condition (p) 9th clock 0.3 v dd 0.7 v dd 0.3 v dd 0.7 v dd r l = load resistor for ledn. c l = load capacitance includes jig and probe capacitance. r t = termination resistance should be equal to the output impedance z o of the pulse generators. fig 21. test circuitry for switching times pulse generator v o c l 50 pf r l 50 002aag466 r t v i v dd dut v dd or v led open v ss
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 42 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 16. package outline fig 22. package outline sot1331-1 (htssop38) 5hihuhqfhv 2xwolqh yhuvlrq (xurshdq surmhfwlrq ,vvxhgdwh ,(& -('(& -(,7$ 627 vrwbsr 8qlw pp pd[ qrp plq $ 'lphqvlrqvppduhwkhruljlqdoglphqvlrqv 1rwh 3odvwlfruphwdosurwuxvlrqvripppd[lpxpshuvlghduhqrwlqfoxghg 3odvwlflqwhuohdgsurwuxvlrqvripppd[lpxpshuvlghduhqrwlqfoxghg +76623sodvwlfwkhupdohqkdqfhgwklqvkulqnvpdoorxwolqhsdfndjhohdgv erg\zlwkppohdgslwfkpph[srvhgglhsdg 627 $ $ $ e s f' ? ? ? ' k ( ( k h + h / / s y z\= pp vfdoh ghwdlo; \ h $ h[srvhgglhsdgvlgh ; z y$ $ $ ( k $ $ / s / ' ' k e s = ( f + ( slqlqgh[
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 43 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 17. handling information all input and output pins are protected ag ainst electrostatic discharge (esd) under normal handling. when handling ensure that the appropriate precautions are taken as described in jesd625-a or equivalent standards. 18. soldering of smd packages this text provides a very brief insight into a complex technology. a more in-depth account of soldering ics can be found in application note an10365 ?surface mount reflow soldering description? . 18.1 introduction to soldering soldering is one of the most common methods through which packages are attached to printed circuit boards (pcbs), to form electr ical circuits. the soldered joint provides both the mechanical and the electrical connection. th ere is no single sold ering method that is ideal for all ic packages. wave soldering is often preferred when through-hole and surface mount devices (smds) are mixed on one printed wiring board; however, it is not suitable for fine pitch smds. reflow soldering is ideal for the small pitches and high densities that come with increased miniaturization. 18.2 wave and reflow soldering wave soldering is a joining technology in which the joints are made by solder coming from a standing wave of liquid solder. the wave soldering process is suitable for the following: ? through-hole components ? leaded or leadless smds, which are glued to the surface of the printed circuit board not all smds can be wave soldered. packages with solder balls, and some leadless packages which have solder lands underneath the body, cannot be wave soldered. also, leaded smds with leads having a pitch smaller than ~0.6 mm cannot be wave soldered, due to an increased pr obability of bridging. the reflow soldering process involves applying solder paste to a board, followed by component placement and exposure to a temperature profile. leaded packages, packages with solder balls, and leadless packages are all reflow solderable. key characteristics in both wave and reflow soldering are: ? board specifications, in cluding the board finish , solder masks and vias ? package footprints, including solder thieves and orientation ? the moisture sensitivit y level of the packages ? package placement ? inspection and repair ? lead-free soldering versus snpb soldering 18.3 wave soldering key characteristics in wave soldering are:
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 44 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver ? process issues, such as application of adhe sive and flux, clinching of leads, board transport, the solder wave parameters, and the time during which components are exposed to the wave ? solder bath specifications, including temperature and impurities 18.4 reflow soldering key characteristics in reflow soldering are: ? lead-free versus snpb solderi ng; note that a lead-free reflow process usually leads to higher minimum peak temperatures (see figure 23 ) than a snpb process, thus reducing the process window ? solder paste printing issues including smearing, release, and adjusting the process window for a mix of large and small components on one board ? reflow temperature profile; this profile includ es preheat, reflow (in which the board is heated to the peak temperature) and cooling down. it is imperative that the peak temperature is high enough for the solder to make reliable solder joints (a solder paste characteristic). in addition, the peak temperature must be low enough that the packages and/or boards are not damaged. the peak temperature of the package depends on package thickness and volume and is classified in accordance with ta b l e 2 4 and 25 moisture sensitivity precautions, as indicat ed on the packing, must be respected at all times. studies have shown that small packages reach higher temperatures during reflow soldering, see figure 23 . table 24. snpb eutectic process (from j-std-020d) package thickness (mm) package reflow temperature ( ?c) volume (mm 3 ) < 350 ? 350 < 2.5 235 220 ? 2.5 220 220 table 25. lead-free process (from j-std-020d) package thickness (mm) package reflow temperature ( ?c) volume (mm 3 ) < 350 350 to 2000 > 2000 < 1.6 260 260 260 1.6 to 2.5 260 250 245 > 2.5 250 245 245
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 45 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver for further information on temperature profiles, refer to application note an10365 ?surface mount reflow soldering description? . msl: moisture sensitivity level fig 23. temperature profiles for large and small components 001aac844 temperature time minimum peak temperature = minimum soldering temperature maximum peak temperature = msl limit, damage level peak temperature
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 46 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 19. soldering: pcb footprints fig 24. pcb footprint for sot1331-1 (htssop38); reflow soldering 627 )rrwsulqwlqirupdwlrqiruuhiorzvroghulqjri+76623sdfndjh rffxslhgduhd vroghuodqg vroghuodqgsoxvvroghusdvwh $\ *\ 6/\ 63\wrw +\ %\ & 63[wrw 6/[ *[ +[ *hqhulfirrwsulqwsdwwhuq 5hihuwrwkhsdfndjhrxwolqhgudzlqjirudfwxdood\rxw 3 63[ 636[ q63[ q63\ 3 ' ? ' 63\ 636\ vrwbiu 'lphqvlrqvlqpp $\ %\ ' *[ *\ +\ 3 & ' +[ 6/[ 6/\ q63[ q63\ 3 636[ 636\ 63[wrw 63\wrw 63[ 63\ ,vvxhgdwh
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 47 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 20. abbreviations 21. revision history table 26. abbreviations acronym description ack acknowledge dut device under test esd electrostatic discharge fet field-effect transistor hbm human body model i 2 c-bus inter-integrated circuit bus led light emitting diode lsb least significant bit msb most significant bit nmos negative-channel metal-oxide semiconductor pcb printed-circuit board pmos positive-channel metal-oxide semiconductor pwm pulse width modulation rgb red/green/blue rgba red/green/blue/amber smbus system management bus table 27. revision history document id release date data sheet status change notice supersedes PCU9956A v.2.1 20150629 product data sheet - PCU9956A v.2 modifications: ? section 7.3.3 ? ledout0 to ledout5, led driver output state ? : added remark. ? table 8 ? mode1 - mode register 1 (address 00h) bit description ? : added table note [3] . PCU9956A v.2 20141014 product data sheet - PCU9956A v.1 modifications: ? section 7.5 ? power-on reset ? : added remark. PCU9956A v.1 20140124 product data sheet - -
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 48 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver 22. legal information 22.1 data sheet status [1] please consult the most recently issued document before initiating or completing a design. [2] the term ?short data sheet? is explained in section ?definitions?. [3] the product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple device s. the latest product status information is available on the internet at url http://www.nxp.com . 22.2 definitions draft ? the document is a draft versi on only. the content is still under internal review and subject to formal approval, which may result in modifications or additions. nxp semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall hav e no liability for the consequences of use of such information. short data sheet ? a short data sheet is an extract from a full data sheet with the same product type number(s) and title. a short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. for detailed and full information see the relevant full data sheet, which is available on request vi a the local nxp semiconductors sales office. in case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. product specification ? the information and data provided in a product data sheet shall define the specification of the product as agreed between nxp semiconductors and its customer , unless nxp semiconductors and customer have explicitly agreed otherwis e in writing. in no event however, shall an agreement be valid in which the nxp semiconductors product is deemed to offer functions and qualities beyond those described in the product data sheet. 22.3 disclaimers limited warranty and liability ? information in this document is believed to be accurate and reliable. however, nxp semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such info rmation. nxp semiconductors takes no responsibility for the content in this document if provided by an information source outside of nxp semiconductors. in no event shall nxp semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. notwithstanding any damages that customer might incur for any reason whatsoever, nxp semiconductors? aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the terms and conditions of commercial sale of nxp semiconductors. right to make changes ? nxp semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. this document supersedes and replaces all information supplied prior to the publication hereof. suitability for use ? nxp semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an nxp semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. nxp semiconductors and its suppliers accept no liability for inclusion and/or use of nxp semiconducto rs products in such equipment or applications and therefore such inclusion and/or use is at the customer?s own risk. applications ? applications that are described herein for any of these products are for illustrative purpos es only. nxp semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. customers are responsible for the design and operation of their applications and products using nxp semiconductors products, and nxp semiconductors accepts no liability for any assistance with applications or customer product design. it is customer?s sole responsibility to determine whether the nxp semiconductors product is suitable and fit for the customer?s applications and products planned, as well as fo r the planned application and use of customer?s third party customer(s). customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. nxp semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer?s applications or products, or the application or use by customer?s third party customer(s). customer is responsible for doing all necessary testing for the customer?s applic ations and products using nxp semiconductors products in order to av oid a default of the applications and the products or of the application or use by customer?s third party customer(s). nxp does not accept any liability in this respect. limiting values ? stress above one or more limiting values (as defined in the absolute maximum ratings system of iec 60134) will cause permanent damage to the device. limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the recommended operating conditions section (if present) or the characteristics sections of this document is not warranted. constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. terms and conditions of commercial sale ? nxp semiconductors products are sold subject to the gener al terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms , unless otherwise agreed in a valid written individual agreement. in case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. nxp semiconductors hereby expressly objects to applying the customer?s general terms and conditions with regard to the purchase of nxp semiconducto rs products by customer. no offer to sell or license ? nothing in this document may be interpreted or construed as an offer to sell products t hat is open for acceptance or the grant, conveyance or implication of any lic ense under any copyrights, patents or other industrial or intellectual property rights. document status [1] [2] product status [3] definition objective [short] data sheet development this document contains data from the objecti ve specification for product development. preliminary [short] data sheet qualification this document contains data from the preliminary specification. product [short] data sheet production this document contains the product specification.
PCU9956A all information provided in this document is subject to legal disclaimers. ? nxp semiconductors n.v. 2015. all rights re served. product data sheet rev. 2 ? 29 june 2015 49 of 50 nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver export control ? this document as well as the item(s) described herein may be subject to export control regu lations. export might require a prior authorization from competent authorities. non-automotive qualified products ? unless this data sheet expressly states that this specific nxp semicon ductors product is automotive qualified, the product is not suitable for automotive use. it is neither qualified nor tested in accordance with automotive testing or application requirements. nxp semiconductors accepts no liabili ty for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. in the event that customer uses t he product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without nxp semiconductors? warranty of the product for such automotive applicat ions, use and specifications, and (b) whenever customer uses the product for automotive applications beyond nxp semiconductors? specifications such use shall be solely at customer?s own risk, and (c) customer fully indemnifies nxp semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive app lications beyond nxp semiconductors? standard warranty and nxp semiconduct ors? product specifications. translations ? a non-english (translated) version of a document is for reference only. the english version shall prevail in case of any discrepancy between the translated and english versions. 22.4 trademarks notice: all referenced brands, produc t names, service names and trademarks are the property of their respective owners. i 2 c-bus ? logo is a trademark of nxp semiconductors n.v. 23. contact information for more information, please visit: http://www.nxp.com for sales office addresses, please send an email to: salesaddresses@nxp.com
nxp semiconductors PCU9956A 24-channel ufm 5 mhz i 2 c-bus 57 ma/20 v constant current led driver ? nxp semiconductors n.v. 2015. all rights reserved. for more information, please visit: http://www.nxp.com for sales office addresses, please se nd an email to: salesaddresses@nxp.com date of release: 29 june 2015 document identifier: PCU9956A please be aware that important notices concerning this document and the product(s) described herein, have been included in section ?legal information?. 24. contents 1 general description . . . . . . . . . . . . . . . . . . . . . . 1 2 features and benefits . . . . . . . . . . . . . . . . . . . . 2 3 applications . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 4 ordering information . . . . . . . . . . . . . . . . . . . . . 3 4.1 ordering options . . . . . . . . . . . . . . . . . . . . . . . . 3 5 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . 4 6 pinning information . . . . . . . . . . . . . . . . . . . . . . 5 6.1 pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 6.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . 6 7 functional description . . . . . . . . . . . . . . . . . . . 7 7.1 device addresses . . . . . . . . . . . . . . . . . . . . . . . 7 7.1.1 regular i 2 c-bus slave address. . . . . . . . . . . . . 7 7.1.2 led all call i 2 c-bus address . . . . . . . . . . . . . 11 7.1.3 led sub call i 2 c-bus addresses . . . . . . . . . . 12 7.2 control register . . . . . . . . . . . . . . . . . . . . . . . . 12 7.3 register definitions . . . . . . . . . . . . . . . . . . . . . 14 7.3.1 mode1 ? mode register 1 . . . . . . . . . . . . . . 16 7.3.2 mode2 ? mode register 2 . . . . . . . . . . . . . . 16 7.3.3 ledout0 to ledo ut5, led driver output state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 7.3.4 grppwm, group duty cycle control . . . . . . . . 18 7.3.5 grpfreq, group frequency . . . . . . . . . . . . . 18 7.3.6 pwm0 to pwm23, individual brightness control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 7.3.7 iref0 to iref23, led output current value registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 7.3.8 offset ? ledn output delay offset register 21 7.3.9 led sub call i 2 c-bus addresses for PCU9956A . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 7.3.10 allcalladr, led all call i 2 c-bus address. 22 7.3.11 pwmall ? brightness control for all ledn outputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7.3.12 irefall register: output current value for all led outputs . . . . . . . . . . . . . . . . . . . . . . . . . . 23 7.3.13 led driver constant current outputs . . . . . . . . 23 7.3.13.1 adjusting output current . . . . . . . . . . . . . . . . . 23 7.3.14 overtemper ature protection . . . . . . . . . . . . . . 25 7.4 active low output enable input . . . . . . . . . . . 25 7.5 power-on reset . . . . . . . . . . . . . . . . . . . . . . . . 26 7.6 hardware reset recovery . . . . . . . . . . . . . . . . 26 7.7 software reset. . . . . . . . . . . . . . . . . . . . . . . . . 26 7.8 individual brightness control with group dimming/blinking . . . . . . . . . . . . . . . . . . . . . . . 28 8 characteristics of the PCU9956A ultra fast-mode i 2 c-bus . . . . . . . . . . . . . . . . . . . . . . 29 8.1 bit transfer . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 8.1.1 start and stop conditions. . . . . . . . . . . . . 29 8.2 system configuration . . . . . . . . . . . . . . . . . . . 30 8.3 data transfer . . . . . . . . . . . . . . . . . . . . . . . . . 30 9 bus transactions . . . . . . . . . . . . . . . . . . . . . . . 31 10 application design-in information. . . . . . . . . 34 10.1 thermal considerations . . . . . . . . . . . . . . . . . 35 11 limiting values . . . . . . . . . . . . . . . . . . . . . . . . 37 12 thermal characteristics . . . . . . . . . . . . . . . . . 37 13 static characteristics . . . . . . . . . . . . . . . . . . . 38 14 dynamic characteristics. . . . . . . . . . . . . . . . . 40 15 test information . . . . . . . . . . . . . . . . . . . . . . . 41 16 package outline. . . . . . . . . . . . . . . . . . . . . . . . 42 17 handling information . . . . . . . . . . . . . . . . . . . 43 18 soldering of smd packages . . . . . . . . . . . . . . 43 18.1 introduction to soldering. . . . . . . . . . . . . . . . . 43 18.2 wave and reflow soldering. . . . . . . . . . . . . . . 43 18.3 wave soldering . . . . . . . . . . . . . . . . . . . . . . . 43 18.4 reflow soldering . . . . . . . . . . . . . . . . . . . . . . 44 19 soldering: pcb footprints . . . . . . . . . . . . . . . 46 20 abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . 47 21 revision history . . . . . . . . . . . . . . . . . . . . . . . 47 22 legal information . . . . . . . . . . . . . . . . . . . . . . 48 22.1 data sheet status . . . . . . . . . . . . . . . . . . . . . . 48 22.2 definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . 48 22.3 disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . 48 22.4 trademarks . . . . . . . . . . . . . . . . . . . . . . . . . . 49 23 contact information . . . . . . . . . . . . . . . . . . . . 49 24 contents. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50

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